Allegro Multimedia Stud Sensor A1321 User Manual

A1321, A1322, and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Features and Benefits  
Temperature-stable quiescent output voltage  
Precise recoverability after temperature cycling  
Description  
TheA132X family of linear Hall-effect sensors are optimized,  
sensitive,andtemperature-stable.TheseratiometricHall-effect  
Output voltage proportional to magnetic flux density  
Ratiometric rail-to-rail output  
Improved sensitivity  
4.5 to 5.5 V operation  
Immunity to mechanical stress  
Solid-state reliability  
sensors provide a voltage output that is proportional to the  
applied magnetic field. The A132X family has a quiescent  
output voltage that is 50% of the supply voltage and output  
sensitivity options of 2.5mV/G, 3.125mV/G, and 5mV/G. The  
features of this family of devices are ideal for use in the harsh  
environments found in automotive and industrial linear and  
rotary position sensing systems.  
Robust EMC protection  
EachdevicehasaBiCMOSmonolithiccircuitwhichintegrates  
a Hall element, improved temperature-compensating circuitry  
to reduce the intrinsic sensitivity drift of the Hall element,  
a small-signal high-gain amplifier, and a rail-to-rail low-  
impedance output stage.  
Packages: 3 pin SOT23W (suffix LH), and  
3 pin SIP (suffix UA)  
A proprietary dynamic offset cancellation technique, with  
an internal high-frequency clock, reduces the residual offset  
voltage normally caused by device overmolding, temperature  
dependencies, and thermal stress. The high frequency clock  
allows for a greater sampling rate, which results in higher  
accuracyandfastersignalprocessingcapability.Thistechnique  
producesdevicesthathaveanextremelystablequiescentoutput  
voltage, are immune to mechanical stress, and have precise  
Continued on the next page…  
Not to scale  
Functional Block Diagram  
V+  
VCC  
VOUT  
Out  
Amp  
Gain  
Offset  
0.1 μF  
Trim  
Control  
GND  
A1321-DS, Rev. 10  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
DEVICE CHARACTERISTICS1 over operating temperature (TA) range, unless otherwise noted  
Characteristic  
Symbol  
Test Conditions  
Min.  
Typ.2  
Max.  
Units  
Electrical Characteristics; VCC = 5 V, unless otherwise noted  
Supply Voltage  
Supply Current  
Quiescent Voltage  
Vcc(op)  
Icc  
Operating; Tj < 165°C  
B = 0, Iout = 0  
4.5  
5.0  
5.6  
2.5  
4.7  
0.2  
–1.5  
8.3  
30  
5.5  
V
mA  
V
8
Vout(q)  
Vout(H)  
Vout(L)  
Iout(LM)  
VZ  
B = 0, TA = 25ºC, Iout = 1 mA  
B = +X, Iout = –1 mA  
B = –X, Iout = 1 mA  
B = –X, Vout 0  
2.425  
2.575  
V
Output Voltage3  
V
Output Source Current Limit3  
Supply Zener Clamp Voltage  
Output Bandwidth  
–1.0  
6
mA  
V
I
= 11 mA = Icc(max) + 3  
cc  
BW  
kHz  
kHz  
Clock Frequency  
fC  
150  
Output Characteristics; over VCC range, unless otherwise noted  
A1321; Cbypass = 0.1 μF, no load  
40  
25  
20  
3
mV  
mV  
mV  
Ω
Noise, Peak-to-Peak4  
VN  
A1322; Cbypass = 0.1 μF, no load  
A1323; Cbypass = 0.1 μF, no load  
Iout ±1 mA  
Output Resistance  
Rout  
RL  
1.5  
Output Load Resistance  
Output Load Capacitance  
Iout ±1 mA, VOUT to GND  
VOUT to GND  
4.7  
kΩ  
nF  
CL  
10  
1 Negative current is dened as conventional current coming out of (sourced from) the specied device terminal.  
2 Typical data is at TA = 25°C. They are for initial design estimations only, and assume optimum manufacturing and application  
conditions. Performance may vary for individual units, within the specied maximum and minimum limits.  
3 In these tests, the vector X is intended to represent positive and negative elds sufcient to swing the output driver between fully OFF  
and saturated (ON), respectively. It is NOT intended to indicate a range of linear operation.  
4 Noise specication includes both digital and analog noise.  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
3
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
MAGNETIC CHARACTERISTICS1,2 over operating temperature range, TA; VCC = 5 V, Iout = –1 mA; unless otherwise noted  
Characteristics  
Symbol  
Test Condition  
Min  
Typ3  
5.000  
3.125  
2.500  
Max  
5.250  
3.281  
2.625  
Units4  
mV/G  
mV/G  
mV/G  
A1321; TA = 25ºC  
A1322; TA = 25ºC  
A1323; TA = 25ºC  
4.750  
2.969  
2.375  
Sensitivity5  
Sens  
Delta Vout(q) as a func-  
tion of temperature  
Vout(q)(ΔT)  
Dened in terms of magnetic ux density, B  
±10  
G
Ratiometry, Vout(q)  
Ratiometry, Sens  
Positive Linearity  
Negative Linearity  
Symmetry  
Vout(q)(ΔV)  
ΔSens(ΔV)  
Lin+  
±1.5  
±1.5  
±1.5  
±1.5  
±1.5  
%
%
%
%
%
Lin–  
Sym  
UA Package  
Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature  
Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature  
–2.5  
–6  
7.5  
4
%
%
%
Sensitivity Drift6  
SensDrift  
TA = 25°C; after temperature cycling and over time  
±2  
LH Package  
Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature  
Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature  
–5  
–3.5  
5
8.5  
%
%
%
Sensitivity Drift6  
SensDrift  
TA = 25°C; after temperature cycling and over time  
±2  
1 Additional information on chracteristics is provided in the section Characteristics Denitions, on the next page.  
2 Negative current is dened as conventional current coming out of (sourced from) the specied device terminal.  
3 Typical data is at TA = 25°C, except for ΔSens, and at x.x Sens. Typical data are for initial design estimations only, and assume optimum  
manufacturing and application conditions. Performance may vary for individual units, within the specied maximum and minimum limits.  
In addition, the typical values vary with gain.  
4 10 G = 1 millitesla.  
5 After 150ºC pre-bake and factory programming.  
6 Sensitivity drift is the amount of recovery with time.  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
4
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Characteristic Denitions  
Quiescent Voltage Output. In the quiescent state (no  
Ratiometric. The A132X family features a ratiometric output.  
magnetic eld), the output equals one half of the supply voltage  
over the operating voltage range and the operating temperature  
range. Due to internal component tolerances and thermal con-  
siderations, there is a tolerance on the quiescent voltage output  
both as a function of supply voltage and as a function of ambient  
temperature. For purposes of specication, the quiescent voltage  
output as a function of temperature is dened in terms of mag-  
netic ux density, B, as:  
The quiescent voltage output and sensitivity are proportional to  
the supply voltage (ratiometric).  
The percent ratiometric change in the quiescent voltage output is  
dened as:  
Vout(q)(V  
Vout(q)(5V)  
)
CC  
(4)  
ΔVout(q)(ΔV)  
=
× 100%  
VCC 5 V  
and the percent ratiometric change in sensitivity is  
dened as:  
Vout(q)(Τ  
V
out(q)(25ºC)  
)
Α
ΔVout(q)(ΔΤ)  
(1)  
=
Sens(25ºC)  
Sens(V  
Sens(5V)  
)
CC  
(5)  
ΔSens(ΔV)  
=
× 100%  
This calculation yields the device’s equivalent accuracy,  
over the operating temperature range, in gauss (G).  
VCC 5 V  
Linearity and Symmetry. The on-chip output stage  
Sensitivity. The presence of a south-pole magnetic eld per-  
pendicular to the package face (the branded surface) increases  
the output voltage from its quiescent value toward the supply  
voltage rail by an amount proportional to the magnetic eld  
applied. Conversely, the application of a north pole will decrease  
the output voltage from its quiescent value. This proportionality  
is specied as the sensitivity of the device and is dened as:  
is designed to provide a linear output with a supply voltage of  
5 V. Although application of very high magnetic elds will not  
damage these devices, it will force the output into a non-linear  
region. Linearity in percent is measured and dened as:  
Vout(+B) Vout(q)  
(6)  
Lin+  
Lin–  
=
=
× 100%  
2(Vout(+B / 2) – Vout(q)  
)
)
Vout(–B) Vout(+B)  
(2)  
Sens  
=
Vout(–B) Vout(q)  
(7)  
2B  
× 100%  
2(Vout(–B / 2) – Vout(q)  
The stability of sensitivity as a function of temperature is  
dened as:  
and output symmetry as:  
Sens(Τ – Sens(25ºC)  
)
Α
(3)  
ΔSens(ΔΤ)  
× 100%  
=
Vout(+B) Vout(q)  
(8)  
Sens(25ºC)  
Sym  
=
× 100%  
Vout(q) – Vout(–B)  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
5
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Typical Characteristics  
(30 pieces, 3 fabrication lots)  
Average Supply Current (ICC) vs Temperature  
V
= 5 V  
cc  
8
7.5  
7
6.5  
6
5.5  
5
4.5  
4
3.5  
3
2.5  
2
1.5  
1
0.5  
0
TA (°C)  
Average Positive Linearity (Lin+) vs Temperature  
Vcc = 5 V  
Average Negative Linearity (Lin–) vs Temperature  
Vcc = 5 V  
105  
104  
103  
102  
101  
100  
99  
105  
104  
103  
102  
101  
100  
99  
98  
98  
97  
97  
96  
96  
95  
95  
TA (°C)  
T
(°C)  
A
Average Ratiometry, VOUT(q)(ΔV) vs Temperature  
Average Ratiometry, ΔSens(ΔV), vs Temperature  
101  
101  
100.8  
100.6  
100.4  
100.2  
100  
4.5 to 5.0V  
5.5 to 5.0V  
100.8  
100.6  
100.4  
100.2  
100  
4.5 to 5.0 V  
5.5 to 5.0 V  
99.8  
99.6  
99.4  
99.2  
99  
99.8  
99.6  
99.4  
99.2  
99  
TA (°C)  
TA (°C)  
Continued on the next page...  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
6
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Typical Characteristics, continued  
(30 pieces, 3 fabrication lots)  
Average Absolute Quiescent Output Voltage, V  
, vs Temperature  
out(q)  
Quiescent Output Voltage, V  
A = 25°C  
, vs V  
out(q)  
cc  
V
cc  
= 5 V  
T
2.575  
2.55  
3
2.9  
2.8  
2.7  
2.6  
2.5  
2.4  
2.3  
2.2  
2.1  
2.525  
2.5  
1321  
1322  
1323  
2.475  
2.45  
2.425  
2
4.5  
5
5.5  
TA (°C)  
V
(V)  
cc  
Average Absolute Sensitivity, Sens, vs Temperature  
= 5 V  
Average Sensitivity, Sens, vs V  
TA = 25°C  
cc  
V
cc  
6
5.5  
5
6
5.5  
5
1321  
1322  
1323  
4.5  
4
4.5  
4
A1322  
A1321  
A1323  
3.5  
3
3.5  
3
2.5  
2
2.5  
2
1.5  
1
4.5  
5
5.5  
TA (°C)  
V
(V)  
cc  
Average Delta Quiescent Output Voltage, V  
,
vs Temperature  
out(q)(ΔT)  
Average Delta Sensitivity, ΔSens, vs Temperature  
Δ in readings at each temperature are relative to 25°C  
= 5 V  
Δ in readings at each temperature are relative to 25°C  
V
= 5 V  
cc  
V
cc  
10  
8
10  
8
6
6
4
4
2
2
0
0
-2  
-4  
-6  
-8  
-10  
-2  
-4  
-6  
-8  
-10  
TA (°C)  
TA (°C)  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
7
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information  
Characteristic  
Symbol  
Test Conditions*  
Value Units  
Package LH, 1-layer PCB with copper limited to solder pads  
228 ºC/W  
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side  
connected by thermal vias  
RθJA  
Package Thermal Resistance  
110  
ºC/W  
Package UA, 1-layer PCB with copper limited to solder pads  
165 ºC/W  
*Additional thermal information available on Allegro website.  
Power Derating Curve  
6
5
4
3
2
1
0
V
CC(max)  
1-layer PCB, Package LH  
(RQJA = 228 ºC/W)  
V
CC(min)  
1-layer PCB, Package UA  
(RQJA = 165 ºC/W)  
2-layer PCB, Package LH  
(RQJA = 110 ºC/W)  
20  
40  
60  
80  
100  
120  
140  
160  
180  
Temperature (ºC)  
Power Dissipation versus Ambient Temperature  
1900  
1800  
1700  
1600  
1500  
1400  
1300  
1200  
1100  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
20  
40  
60  
80  
100  
120  
140  
160  
180  
Temperature (°C)  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
8
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Power Derating  
Example: Reliability for VCC at TA=150°C, package UA, using  
minimum-K PCB.  
The device must be operated below the maximum junction  
temperature of the device, TJ(max). Under certain combinations of  
peak conditions, reliable operation may require derating sup-  
plied power or improving the heat dissipation properties of the  
application. This section presents a procedure for correlating  
factors affecting operating TJ. (Thermal data is also available on  
the Allegro MicroSystems Web site.)  
Observe the worst-case ratings for the device, specically:  
RθJA=165°C/W, TJ(max) =165°C, VCC(max)= 5.5 V, and  
ICC(max) = 8 mA.  
Calculate the maximum allowable power level, PD(max). First,  
invert equation 3:  
The Package Thermal Resistance, RθJA, is a gure of merit sum-  
marizing the ability of the application and the device to dissipate  
heat from the junction (die), through all paths to the ambient air.  
Its primary component is the Effective Thermal Conductivity,  
K, of the printed circuit board, including adjacent devices and  
traces. Radiation from the die through the device case, RθJC, is  
relatively small component of RθJA. Ambient air temperature,  
TA, and air motion are signicant external factors, damped by  
overmolding.  
ΔTmax = TJ(max) – TA = 165°C150°C = 15°C  
This provides the allowable increase to TJ resulting from internal  
power dissipation. Then, invert equation 2:  
PD(max) = ΔTmax ÷RθJA =1C÷165 °C/W=91mW  
Finally, invert equation 1 with respect to voltage:  
VCC(est) = PD(max) ÷ ICC(max) = 91mW÷8mA=11.4 V  
The effect of varying power levels (Power Dissipation, PD), can  
be estimated. The following formulas represent the fundamental  
relationships used to estimate TJ, at PD.  
The result indicates that, at TA, the application and device can  
dissipate adequate amounts of heat at voltages VCC(est)  
.
Compare VCC(est) to VCC(max). If VCC(est) VCC(max), then reli-  
able operation between VCC(est) and VCC(max) requires enhanced  
RθJA. If VCC(est) VCC(max), then operation between VCC(est) and  
VCC(max) is reliable under these conditions.  
PD = VIN  
I
(1)  
×
IN  
ΔT = PD  
R
(2)  
θJA  
×
TJ = TA + ΔT  
(3)  
For example, given common conditions such as: TA= 25°C,  
VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then:  
PD = VCC  
I
= 12 V 4 mA = 48 mW  
×
×
CC  
ΔT = PD  
R
= 48 mW 140 °C/W = 7°C  
×
×
θJA  
TJ = TA + ΔT = 25°C + 7°C = 32°C  
A worst-case estimate, PD(max), represents the maximum allow-  
able power level (VCC(max), ICC(max)), without exceeding TJ(max)  
at a selected RθJA and TA.  
,
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
9
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Package LH, 3-Pin; (SOT-23W)  
2.975  
3
B
1.49  
A
4º  
0.28  
0.180  
B
0.96  
2.90  
1.91  
B
0.38  
2
1
0.25  
Seating Plane  
Gauge Plane  
10º  
1.00  
All dimensions nominal, not for tooling use  
Dimensions in millimeters  
10º  
0.95  
0.40  
A
B
0.05  
Active Area Depth  
Hall element, not to scale  
Pin-out Drawings  
Package UA  
Package LH  
3
1
2
1
2
3
Terminal List  
Number  
Symbol  
Description  
Package LH  
Package UA  
VCC  
VOUT  
GND  
1
2
3
1
3
2
Connects power supply to chip  
Output from circuit  
Ground  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
10  
Worcester, Massachusetts 01615-0036 U.S.A.  
 
A1321, A1322,  
and A1323  
Ratiometric Linear Hall Effect Sensor  
for High-Temperature Operation  
Package UA, 3-Pin SIP  
4.09  
4.09  
45°  
45°  
A
A
B
B
C
C
2.01  
2.01  
3X10°  
C
1.52  
1.52  
3.02  
3.02  
1.44  
1.44  
C
45°  
45°  
C
C
0.79  
0.79  
1.02  
MAX  
2.16  
MAX  
14.99  
0.41  
15.75  
0.41  
1
2
3
1
2
3
0.43  
1.27  
0.43  
1.27  
Package UA, Conventional Leadframe  
Package UA, Matrix Leadframe  
All dimensions nominal, not for tooling use  
Dimensions in millimeters  
Exact case and lead configuration at supplier  
discretion within limits shown  
Active Area Depth, 0.50 mm  
A
B
C
Gate and tie bar burr area (for conventional leadframe, gate burr only)  
Hall element, not to scale  
Copyright ©2004-2008, Allegro MicroSystems, Inc.  
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;  
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.  
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per-  
mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the  
information being relied upon is current.  
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the  
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.  
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;  
nor for any infringement of patents or other rights of third parties which may result from its use.  
For the latest version of this document, visit our website:  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
11  
Worcester, Massachusetts 01615-0036 U.S.A.  
 

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